FIX VCD generation format for bus wire
Quote from fredcwGO_BR on August 26, 2026, 7:19 pmHowdy,
Just started today, in my fork, modifying the VCD Export to accomodate correctly generated bus connections to the VCD format.
But couldn't figure out where i can get the connected bus width on the LA.
isBus() --> true/false. .. OK , where should I look to find the busproperties of the connected Pin on the AL .
Could you point me in the right direction ?
Thanks in advance .
P.S.
the commited https://github.com/fredcwbr/SimulIDE-dev.git is a WIP .. not ready... Working on it..
.h QString &LAnalizer::VCDbinEncoder( int64_t value , int pin ) ; int wireLength( int pin ) { return isbus ? m_channel[pin]->length() : 1 ; } *** /* * * VDC binary encoder ., * vl : int in ... * sz : int in .. * str : out .. * */ QString &LAnalizer::VCDbinEncoder( int64_t value , int pin ) { // VCDencoded bus vector QString cdBus("b"); // Pin s(x) .. // // int wirelength = ( isbus ? pin.length : 1 ) for( int i = wireLength( pin ) ; i > 0 ;) { cdBus << ( value & (1<<(--i)) ? '1' : '0' ); } cdBus << ' '; // mandatory space delimiter on VCD wire vector return cdBus; } /* moved inside .h << int &LAnalizer::wireLength( pin ) */ void LAnalizer::dumpData( QString fn ) { /* * https://en.wikipedia.org/wiki/Value_change_dump * The identifier is composed of one or more printable ASCII characters * from ! to ~ (decimal 33 to 126) * * if bus signals exist , they can be grouped (nested) in * and vectored to the VCD , with bit representation * * these are conventionally kept short (i.e. one or two characters). * * */ * * * * * * /* * if is_bus ., wirelength <= buslenght , * and coding VCD will be: 'b[D{*N}] S' , * where: * N = Number of bits., * D = Bit value * S = Channel symbol * * **** VERIFY **** * Apparently simulide does get bus bits as absolute, * so a remapped bus that has 8 bits starting from 8 [8..15] , * is registered on the analyzer as 16 bit values * Since this analyzer enables supposedly any bitlength bus, * IMHO if the channel should record the bits from 0 to buslength * as presented to the channel to match whatever * label was given independently of the wiring., * * Conside the following examples: High order bit of a bus, [8..15] , * Value >>> should show <<<< shows... * 0x01 b00000001 512 * 0x02 b00000010 1024 * 0x04 b00000100 2048 * * wireLength <-- m_channel bus_width .<<< * */ varDef += "$var wire " + QString(wireLength()) + " " + QString( identifiers[ch] ) + " " + name + " $end\n"; * * * * * * if ( !init ) { /* ***** WIP ***** */ /* encode val to wirelength if > 1 to bn... VCD vector format ., * where n is the bit image of the value, with wirelength size */ dumpVars += QString::number( initVal ) + identifiers[ch] + "\n"; // Add initial value * * * * * * for ( sample_t sample : samples.values( time ) ) /* ***** WIP ***** */ /* encode val to wirelength if > 1 to bn... VCD vector format ., */ out << " " << VCDbinEncoder( sample.value , sample.channel ) << identifiers[sample.channel]; * * *
Howdy,
Just started today, in my fork, modifying the VCD Export to accomodate correctly generated bus connections to the VCD format.
But couldn't figure out where i can get the connected bus width on the LA.
isBus() --> true/false. .. OK , where should I look to find the busproperties of the connected Pin on the AL .
Could you point me in the right direction ?
Thanks in advance .
P.S.
the commited https://github.com/fredcwbr/SimulIDE-dev.git is a WIP .. not ready... Working on it..
.h
QString &LAnalizer::VCDbinEncoder( int64_t value , int pin ) ;
int wireLength( int pin ) { return isbus ? m_channel[pin]->length() : 1 ; }
***
/*
*
* VDC binary encoder .,
* vl : int in ...
* sz : int in ..
* str : out ..
*
*/
QString &LAnalizer::VCDbinEncoder( int64_t value , int pin ) {
// VCDencoded bus vector
QString cdBus("b");
// Pin s(x) .. //
// int wirelength = ( isbus ? pin.length : 1 )
for( int i = wireLength( pin ) ; i > 0 ;) {
cdBus << ( value & (1<<(--i)) ? '1' : '0' );
}
cdBus << ' '; // mandatory space delimiter on VCD wire vector
return cdBus;
}
/* moved inside .h <<
int &LAnalizer::wireLength( pin )
*/
void LAnalizer::dumpData( QString fn ) {
/*
* https://en.wikipedia.org/wiki/Value_change_dump
* The identifier is composed of one or more printable ASCII characters
* from ! to ~ (decimal 33 to 126)
*
* if bus signals exist , they can be grouped (nested) in
* and vectored to the VCD , with bit representation
*
* these are conventionally kept short (i.e. one or two characters).
*
*
*/
*
*
*
*
*
*
/*
* if is_bus ., wirelength <= buslenght ,
* and coding VCD will be: 'b[D{*N}] S' ,
* where:
* N = Number of bits.,
* D = Bit value
* S = Channel symbol
*
* **** VERIFY ****
* Apparently simulide does get bus bits as absolute,
* so a remapped bus that has 8 bits starting from 8 [8..15] ,
* is registered on the analyzer as 16 bit values
* Since this analyzer enables supposedly any bitlength bus,
* IMHO if the channel should record the bits from 0 to buslength
* as presented to the channel to match whatever
* label was given independently of the wiring.,
*
* Conside the following examples: High order bit of a bus, [8..15] ,
* Value >>> should show <<<< shows...
* 0x01 b00000001 512
* 0x02 b00000010 1024
* 0x04 b00000100 2048
*
* wireLength <-- m_channel bus_width .<<<
*
*/
varDef += "$var wire " + QString(wireLength()) + " " + QString( identifiers[ch] ) + " " + name + " $end\n";
*
*
*
*
*
*
if ( !init ) {
/* ***** WIP ***** */
/* encode val to wirelength if > 1 to bn... VCD vector format .,
* where n is the bit image of the value, with wirelength size
*/
dumpVars += QString::number( initVal ) + identifiers[ch] + "\n"; // Add initial value
*
*
*
*
*
*
for ( sample_t sample : samples.values( time ) )
/* ***** WIP ***** */
/* encode val to wirelength if > 1 to bn... VCD vector format ., */
out << " " << VCDbinEncoder( sample.value , sample.channel ) << identifiers[sample.channel]; * * *
Quote from arcachofo on August 27, 2026, 11:50 amHi.
There is nothing like "bus size" here.
You can find which is the highest bit registered in a Logic Analyzer channel, which is the effective bus width.in LaChannel::stamp(), when m_busNodes is read you can keep track of bit numbers and get the highest value.
Hi.
There is nothing like "bus size" here.
You can find which is the highest bit registered in a Logic Analyzer channel, which is the effective bus width.
in LaChannel::stamp(), when m_busNodes is read you can keep track of bit numbers and get the highest value.
Quote from arcachofo on August 27, 2026, 7:11 pmFor example:
src/components/meters/lachannel.cpp
void LaChannel::stamp() // Called at Simulation Start { DataChannel::stamp(); m_analizer->conditonMet( m_channel, C_LOW ); addReading( 0 ); m_bitLength = 1; if( m_pin->isBus() ) { bool connected = m_pin->connector(); m_plotBase->display()->connectChannel( m_channel, connected ); for( eNode* node : m_busNodes ){ node->voltChangedCallback( this ); int bit = m_busNodes.key( node ); if( m_bitLength <= bit ) m_bitLength = bit+1; } } }
Using LaChannel::bitLength() instead of LaChannel::length()
src/components/meters/lachannel.h
int bitLength() { return m_bitLength; } private: int m_bitLength;
It will give you bitLength = 6 in this case:
For example:
src/components/meters/lachannel.cpp
void LaChannel::stamp() // Called at Simulation Start
{
DataChannel::stamp();
m_analizer->conditonMet( m_channel, C_LOW );
addReading( 0 );
m_bitLength = 1;
if( m_pin->isBus() )
{
bool connected = m_pin->connector();
m_plotBase->display()->connectChannel( m_channel, connected );
for( eNode* node : m_busNodes ){
node->voltChangedCallback( this );
int bit = m_busNodes.key( node );
if( m_bitLength <= bit ) m_bitLength = bit+1;
}
}
}
Using LaChannel::bitLength() instead of LaChannel::length()
src/components/meters/lachannel.h
int bitLength() { return m_bitLength; }
private:
int m_bitLength;
It will give you bitLength = 6 in this case:

Quote from fredcwGO_BR on September 14, 2026, 6:01 pmJust to inform,
Did the first upload that appears to work .,
It surely needs more testing.It adheres to tha basic VCD vector format, but does not include scopes yet.
Continue to work on it in the near future. As it is now, gtkwave does not have any problem.,
to use with pulseview, a vcd2pvcd utility will do the job .. it's on the way .,
hope this mod helps someone.
Thanks for you support
Just to inform,
Did the first upload that appears to work .,
It surely needs more testing.
It adheres to tha basic VCD vector format, but does not include scopes yet.
Continue to work on it in the near future. As it is now, gtkwave does not have any problem.,
to use with pulseview, a vcd2pvcd utility will do the job .. it's on the way .,
hope this mod helps someone.
Thanks for you support
Quote from fredcwGO_BR on September 21, 2026, 7:34 pmHowdy,
Got VCD wire encoding working for GTKWave and PULSEVIEW
fred@alpha:~/Arduino/MegaMemTest$ ~/sr/bin/pulseview -c -l 5 -D -I vcd -i MegaExtMEMPortX._LAnalizer-2.vcd & [1] 3290405 fred@alpha:~/Arduino/MegaMemTest$ sr: [00:00.000036] log: libsigrok loglevel set to 5. srd: libsigrokdecode loglevel set to 5. Settings: "/home/fred/.config/sigrok/PulseView.conf" format QSettings::NativeFormat sr: [00:00.000491] backend: libsigrok 0.6.0-git-0bc24877/4:0:0. sr: [00:00.000550] backend: Libs: glib 2.84.4 (rt: 2.84.4/8404:4), zlib 1.3.1, libzip 1.11.3, minilzo 2.10, libserialport 0.1.1/1:0:1 (rt: 0.1.1/1:0:1), libusb-1.0 1.0.28.11946 API 0x0100010a, hidapi 0.14.0, bluez 5.82, libftdi 1.5. sr: [00:00.000570] backend: Host: x86_64-pc-linux-gnu, little-endian. sr: [00:00.000576] backend: SCPI backends: TCP, RPC, serial, USBTMC.The megaXMEM interface is mainly working, pending understanding of why PORTG does not fire simulation updates.,
since i cannot open PR on github, .. dropping this note.
maybe it's useful for someone.Thanks a lot.
Able to merge. These branches can be automatically merged. An owner of this repository has limited the ability to open a pull request to users that are collaborators on this repository.
Howdy,
Got VCD wire encoding working for GTKWave and PULSEVIEW
fred@alpha:~/Arduino/MegaMemTest$ ~/sr/bin/pulseview -c -l 5 -D -I vcd -i MegaExtMEMPortX._LAnalizer-2.vcd &
[1] 3290405
fred@alpha:~/Arduino/MegaMemTest$ sr: [00:00.000036] log: libsigrok loglevel set to 5.
srd: libsigrokdecode loglevel set to 5.
Settings: "/home/fred/.config/sigrok/PulseView.conf" format QSettings::NativeFormat
sr: [00:00.000491] backend: libsigrok 0.6.0-git-0bc24877/4:0:0.
sr: [00:00.000550] backend: Libs: glib 2.84.4 (rt: 2.84.4/8404:4), zlib 1.3.1, libzip 1.11.3, minilzo 2.10, libserialport 0.1.1/1:0:1 (rt: 0.1.1/1:0:1), libusb-1.0 1.0.28.11946 API 0x0100010a, hidapi 0.14.0, bluez 5.82, libftdi 1.5.
sr: [00:00.000570] backend: Host: x86_64-pc-linux-gnu, little-endian.
sr: [00:00.000576] backend: SCPI backends: TCP, RPC, serial, USBTMC.
The megaXMEM interface is mainly working, pending understanding of why PORTG does not fire simulation updates.,
since i cannot open PR on github, .. dropping this note.
maybe it's useful for someone.
Thanks a lot.
Able to merge. These branches can be automatically merged.
An owner of this repository has limited the ability to open a pull request to users that are collaborators on this repository.
