bugs in SPI @mega328? (v1.1.0 SR0)
Quote from TimFisch on June 8, 2024, 1:49 pmI tried to make a simple SPI example for my class when I stumbled over three strange behaviors of the SPI interface of the simulated mega328. All appeared with SimulIDE v1.1.0 SR0 on Windows 10.
I used the simulation, c-code, and hex-files in the attached zip.
- issue: max SPI speed
- Description: Once setting SPR1 = 0 and SPR0 = 0, the setting of SPI2X doesn't change the speed. Based on the datasheet page 141 it should be possible to have a max speed of f_OSC/2 for SPR1 = 0, SPR0 = 0, SPI2X = 1. But this seems not to be possible.
- How to reproduce:
- Stop simulation, flash master and slave hex's, state of CHPA and CPOL don't matter
- Change SPI2X to high on top left corner (PINB6 is read in and used as SPI2X in SPSR)
- Start simulation, expected behavior vs. simulation result:
- SPSR SPI2X is set to 1 (works),
- SCK is set to f_OSC/2 = 16 MHz/2 = 8 MHz (doesn't work, it is 4 MHz)
- Stop simulation
- Change SPI2X to low on top left corner (PINB6 is read in and used as SPI2X in SPSR)
- Start simulation, expected behavior vs. simulation result:
- SPSR SPI2X is set to 0 (doesn't work, stays set to 1),
- SCK is set to f_OSC/2 = 16 MHz/4 = 8 MHz (well, it's still 4 MHz)
- recorded video of the bug: https://wiki.mexle.org/_media/spi_spi2x_frq_doesnt_change.mp4
- I assume that the R/W state of the bit might be wrong
- issue: MSB of MOSI
- Description: I do not get the most significant bit of MOSI right. The slave SPDR is set correctly, but the digital levels on the bus don't get it right. It is always set to the MSB of MISO, independent of the bit in slave SPDR. I tried to change the phase (CPHA) and polarity (CPOL), but it didn't change the picture.
- How to reproduce:
- Stop simulation, flash master and slave hex's, states of SPI2X, CHPA, and CPOL don't matter
- Start simulation
- Set MISO (tip switches below) to 0b1000 0100
- Set MOSI (tip switches top) to 0b0000 0001
- Expected behavior vs. simulation result:
- slave SPDR toggles between 0b1000 0100 and 0b0000 0001 (correct)
- scope shows MISO 0b0000 0100 and MOSI 0b0000 0001 (MISO not correct.)
- change MOSI (tip switches top) to 0b1000 0001 and MISO to 0b0000 0100
- Expected behavior vs. simulation result:
- slave SPDR toggles between 0b0000 0100 and 0b1000 0001 (correct)
- scope shows MISO 0b1000 0100 and MOSI 0b1000 0001 (MISO not correct.)
- recorded video of the bug: https://wiki.mexle.org/_media/spi_miso_msb_only_based_on_mosi_msb.mp4
- issue: sometimes first message is skipped
- Description: Sometimes, at the start of the simulation, the first MOSI message seems to be skipped. It seems to be related to whether I changed the phase and/or polarity in the previous run of the simulation.
- How to reproduce:
- Stop simulation, flash master and slave hex's, state of SPI2X = CHPA = CPOL = 0
- Set MOSI (tip switches top) to 0b0000 0000 (switches the code to send up-counting values starting with 1)
- Start simulation
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0001 (works)
- Stop simulation
- Change CPOL = 1
- Start simulation
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0010 (most of the time... not correct)
- Stop simulation
- Change CPOL back to 0
- Start simulation
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0010 (most of the time... not correct)
- Restart the simulation, without any changes
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0001 (most of the time... works again
- recorded video of the bug: https://wiki.mexle.org/_media/spi_sometimes_first_mosi_data_is_missed.mp4
I tried to make a simple SPI example for my class when I stumbled over three strange behaviors of the SPI interface of the simulated mega328. All appeared with SimulIDE v1.1.0 SR0 on Windows 10.
I used the simulation, c-code, and hex-files in the attached zip.
- issue: max SPI speed
- Description: Once setting SPR1 = 0 and SPR0 = 0, the setting of SPI2X doesn't change the speed. Based on the datasheet page 141 it should be possible to have a max speed of f_OSC/2 for SPR1 = 0, SPR0 = 0, SPI2X = 1. But this seems not to be possible.
- How to reproduce:
- Stop simulation, flash master and slave hex's, state of CHPA and CPOL don't matter
- Change SPI2X to high on top left corner (PINB6 is read in and used as SPI2X in SPSR)
- Start simulation, expected behavior vs. simulation result:
- SPSR SPI2X is set to 1 (works),
- SCK is set to f_OSC/2 = 16 MHz/2 = 8 MHz (doesn't work, it is 4 MHz)
- Stop simulation
- Change SPI2X to low on top left corner (PINB6 is read in and used as SPI2X in SPSR)
- Start simulation, expected behavior vs. simulation result:
- SPSR SPI2X is set to 0 (doesn't work, stays set to 1),
- SCK is set to f_OSC/2 = 16 MHz/4 = 8 MHz (well, it's still 4 MHz)
- recorded video of the bug: https://wiki.mexle.org/_media/spi_spi2x_frq_doesnt_change.mp4
- I assume that the R/W state of the bit might be wrong
- issue: MSB of MOSI
- Description: I do not get the most significant bit of MOSI right. The slave SPDR is set correctly, but the digital levels on the bus don't get it right. It is always set to the MSB of MISO, independent of the bit in slave SPDR. I tried to change the phase (CPHA) and polarity (CPOL), but it didn't change the picture.
- How to reproduce:
- Stop simulation, flash master and slave hex's, states of SPI2X, CHPA, and CPOL don't matter
- Start simulation
- Set MISO (tip switches below) to 0b1000 0100
- Set MOSI (tip switches top) to 0b0000 0001
- Expected behavior vs. simulation result:
- slave SPDR toggles between 0b1000 0100 and 0b0000 0001 (correct)
- scope shows MISO 0b0000 0100 and MOSI 0b0000 0001 (MISO not correct.)
- change MOSI (tip switches top) to 0b1000 0001 and MISO to 0b0000 0100
- Expected behavior vs. simulation result:
- slave SPDR toggles between 0b0000 0100 and 0b1000 0001 (correct)
- scope shows MISO 0b1000 0100 and MOSI 0b1000 0001 (MISO not correct.)
- recorded video of the bug: https://wiki.mexle.org/_media/spi_miso_msb_only_based_on_mosi_msb.mp4
- issue: sometimes first message is skipped
- Description: Sometimes, at the start of the simulation, the first MOSI message seems to be skipped. It seems to be related to whether I changed the phase and/or polarity in the previous run of the simulation.
- How to reproduce:
- Stop simulation, flash master and slave hex's, state of SPI2X = CHPA = CPOL = 0
- Set MOSI (tip switches top) to 0b0000 0000 (switches the code to send up-counting values starting with 1)
- Start simulation
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0001 (works)
- Stop simulation
- Change CPOL = 1
- Start simulation
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0010 (most of the time... not correct)
- Stop simulation
- Change CPOL back to 0
- Start simulation
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0010 (most of the time... not correct)
- Restart the simulation, without any changes
- Expected behavior vs. simulation result:
- slave SPDR shall start with 0b0000 0001
- slave SPDR starts with 0b0000 0001 (most of the time... works again
- recorded video of the bug: https://wiki.mexle.org/_media/spi_sometimes_first_mosi_data_is_missed.mp4
Quote from arcachofo on June 8, 2024, 6:26 pmHi. Thank you very much for the detailed report and test circuit.
I think all issues are solved in the last commits.
I still have to fix some other issue and then I will upload new executables (hopefully tomorrow).
Hi. Thank you very much for the detailed report and test circuit.
I think all issues are solved in the last commits.
I still have to fix some other issue and then I will upload new executables (hopefully tomorrow).