AVRasm2, Atmega8, Fast PWM with ICR1 for Top
Quote from KerimF on April 1, 2024, 3:42 pmSimulIDE_1.1.0-SR0_Win32
SimulIDE-R2259_Win32
Windows 7, 32
ATmega8, 8 MhzI likely have missed something because when PWM of timer 1 is activated, OC1A pin stays high.
Please see attached file 'AVDC_16_01T_v1.zip'
;==========================
Settings:
At boot,
DDRB,1 = 1
PORTB,1=0
[PB1 is low output]Then, at line 1749,
OCR1AH = 0
OCR1AL = 24 ;[for 3us pulse]
TCCR1B = 0b00011001
TCCR1A = 0b10000010
ICR1H = high(364) ;[45.5 us period]
ICR1L = low(364); Fast PWM [21978 Hz], Compare Output Mode
; TOP=ICR1=364 [45.5 us]
; Clear OC1A on Compare Match, set OC1A at BOTTOM, (non-inverting mode)
; OC1B disconnected, normal port operation.
; prescaler, MCU clk / 1 [0.125 us]From ATmega8 datasheet:
The ICR1 Register can only be written when using a Waveform Generation mode that utilizes the ICR1 Register for defining the counter’s TOP value.
In these cases the Waveform Generation mode (WGM13:0) bits must be set before the TOP value can be written to the ICR1 Register.
When writing the ICR1 Register the High byte must be written to the ICR1H I/O location before the Low byte is written to ICR1L.
SimulIDE_1.1.0-SR0_Win32
SimulIDE-R2259_Win32
Windows 7, 32
ATmega8, 8 Mhz
I likely have missed something because when PWM of timer 1 is activated, OC1A pin stays high.
Please see attached file 'AVDC_16_01T_v1.zip'
;==========================
Settings:
At boot,
DDRB,1 = 1
PORTB,1=0
[PB1 is low output]
Then, at line 1749,
OCR1AH = 0
OCR1AL = 24 ;[for 3us pulse]
TCCR1B = 0b00011001
TCCR1A = 0b10000010
ICR1H = high(364) ;[45.5 us period]
ICR1L = low(364)
; Fast PWM [21978 Hz], Compare Output Mode
; TOP=ICR1=364 [45.5 us]
; Clear OC1A on Compare Match, set OC1A at BOTTOM, (non-inverting mode)
; OC1B disconnected, normal port operation.
; prescaler, MCU clk / 1 [0.125 us]
From ATmega8 datasheet:
The ICR1 Register can only be written when using a Waveform Generation mode that utilizes the ICR1 Register for defining the counter’s TOP value.
In these cases the Waveform Generation mode (WGM13:0) bits must be set before the TOP value can be written to the ICR1 Register.
When writing the ICR1 Register the High byte must be written to the ICR1H I/O location before the Low byte is written to ICR1L.
Uploaded files:
Quote from arcachofo on April 2, 2024, 12:34 pmI haven't found the issue yet, but you could try to write OCR and ICR first and then TTCRs, maybe that could help.
I haven't found the issue yet, but you could try to write OCR and ICR first and then TTCRs, maybe that could help.
Quote from arcachofo on April 2, 2024, 1:01 pmSeems that the problem happens at line 1749: OCRAH is writen 24 and OCRAL = 0.
So the compare match value is higher than Timer overflow value.
Probably it shoul be:OUT OCR1AH, r19 ;1a OUT OCR1AL, r18 ;1a
Seems that the problem happens at line 1749: OCRAH is writen 24 and OCRAL = 0.
So the compare match value is higher than Timer overflow value.
Probably it shoul be:
OUT OCR1AH, r19 ;1a
OUT OCR1AL, r18 ;1a
Quote from KerimF on April 2, 2024, 1:40 pmQuote from arcachofo on April 2, 2024, 1:01 pmSeems that the problem happens at line 1749: OCRAH is writen 24 and OCRAL = 0.
So the compare match value is higher than Timer overflow value.
Probably it shoul be:OUT OCR1AH, r19 ;1a OUT OCR1AL, r18 ;1a
You did it. You are my hero. Thank you very much and I apologize to take your precious time to fix a silly bug I did.
Quote from arcachofo on April 2, 2024, 1:01 pmSeems that the problem happens at line 1749: OCRAH is writen 24 and OCRAL = 0.
So the compare match value is higher than Timer overflow value.
Probably it shoul be:OUT OCR1AH, r19 ;1a OUT OCR1AL, r18 ;1a
You did it. You are my hero. Thank you very much and I apologize to take your precious time to fix a silly bug I did.